In data recording systems there must always accompany the recorded data a clocking signal or means to generate a clocking signal during readback so that the information can be properly interpreted. Thus during recording there is supplied to the write electronic circuit a clocking signal which is used to regulate the writing process. In past devices this clocking signal has been supplied by a phase locked circuit having an oscillator for the generation of a pulsed signal.
During the readback phase of data recording the data is detected and a clocking signal is generated which must be synchronized in frequency and phase with the data. The clocking signal is then used to decode the data for processing. In order to generate a satisfactory clocking signal during readback the oscillator in the readback circuit must be set to the exact frequency and also corrected in phase relationship with the data. To achieve this result there is recorded at the beginning of each data address on the media a series of clocking pulses provided for the purpose of synchronizing the frequency and phase relationship between the data and the signal of the clocking pulse generator. Of course no data can be read during this synchronizing period while the clocking signal is being synchronized with the data signal. Thus there is always a time delay between the location and verification of the address and the reading of the data. In addition the inclusion of these clocking pulses at the recorded data addresses takes up space on the recording media. Thus any improvement in speeding up the synchronization of the readout clocking signal with the data will provide a marked improvement both as to time and media recording space in the system.
One improvement in such data storage apparatus is disclosed in U.S. Pat. No. 3,577,132 issued May 4, 1971 and entitled Phase Locked Oscillator for Storage Apparatus. It is recognized that the storage media in being moved relative to the recording and readback head can have variations in velocity. For instance with disc drive recording devices, the rotational speed of the disc can vary one or two percent, therefore an oscillator in the readback or recording circuit cannot be set at a constant frequency because these variations in speed of the recording media will change the actual frequency of the data thereby requiring that the clocking signal generator be maintained in synchronization with the relative velocity of the media. The above-mentioned patent describes one method of achieving this result by providing means for generating a reference signal representative of the angular velocity and phase of the storage means. A voltage control oscillator used for generating the clocking signal is regulated in response to this reference signal to correlate the frequency of the clocking signal with the velocity of the recording media relative to the read/write head.
Other attempts to reduce the time differential between the location of an address and the synchronization of the clocking signal have involved improvements in the phase lock oscillator circuit provided for generating the clocking signal. For instance, if the gain or bandwidth is increased, the clocking signal generator will lock onto the data both in frequency and phase at a faster rate. The lock-on time for the generator is an inverse function of the bandwidth of the clock recovery phase locked loop. However, attempts to increase the bandwidth makes the system more responsive to perturbation in the phase of the readback signal due to noise or pulse crowding and can cause unreliable clocking signals. Further attempts to improve such data readback systems have involved the use of dual mode phase locked oscillator systems such as that disclosed in U.S. Pat. No. 3,719,896 issued on Mar. 6, 1973, and entitled Phase Lock Oscillator With Phase Compensation Circuit for Use in Data Processing System. Such systems increase the bandwidth of the phase locked loop during the period of synchronization with the data signal and decrease the bandwidth during the normal data readback operation. Of course such systems are more complicated.
In each instance in prior recording and readback systems of the type previously discussed, there have been utilized separate phase locked circuits for the generation of a clocking signal during the writing of data and the generation of a clocking signal during the reading of data. Thus such readback clocking systems are subjected to typical servo system transient, lock-on time delays sometimes referred to as acquistion times in that the clocking signal generators must be synchronized with the data each time. Also such systems are complicated by the inclusion of these separate circuits. It is the purpose of the present invention to provide an improved data recording and readback system of the type heretofore discussed.